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Fix SoftFloat "INLINE"s missed by commit a52aa7eb1b due to repackaging done by commit a3144fa5cf

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This commit is contained in:
Fish-Git
2012-05-15 17:22:58 -07:00
parent 5b227c602a
commit c55b2afac4
4 changed files with 43 additions and 43 deletions
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38
SoftFloat-Fish/SoftFloat-macros.h
View File

@@ -52,7 +52,7 @@ these four paragraphs for those parts of this code that are retained.
| The result is stored in the location pointed to by `zPtr'.
*----------------------------------------------------------------------------*/
INLINE void shift32RightJamming( bits32 a, int16 count, bits32 *zPtr )
static INLINE void shift32RightJamming( bits32 a, int16 count, bits32 *zPtr )
{
bits32 z;
@@ -78,7 +78,7 @@ INLINE void shift32RightJamming( bits32 a, int16 count, bits32 *zPtr )
| The result is stored in the location pointed to by `zPtr'.
*----------------------------------------------------------------------------*/
INLINE void shift64RightJamming( bits64 a, int16 count, bits64 *zPtr )
static INLINE void shift64RightJamming( bits64 a, int16 count, bits64 *zPtr )
{
bits64 z;
@@ -112,7 +112,7 @@ INLINE void shift64RightJamming( bits64 a, int16 count, bits64 *zPtr )
| described above, and is returned at the location pointed to by `z1Ptr'.)
*----------------------------------------------------------------------------*/
INLINE void
static INLINE void
shift64ExtraRightJamming(
bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr )
{
@@ -149,7 +149,7 @@ INLINE void
| which are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
*----------------------------------------------------------------------------*/
INLINE void
static INLINE void
shift128Right(
bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr )
{
@@ -184,7 +184,7 @@ INLINE void
| the locations pointed to by `z0Ptr' and `z1Ptr'.
*----------------------------------------------------------------------------*/
INLINE void
static INLINE void
shift128RightJamming(
bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr )
{
@@ -235,7 +235,7 @@ INLINE void
| `z2Ptr'.)
*----------------------------------------------------------------------------*/
INLINE void
static INLINE void
shift128ExtraRightJamming(
bits64 a0,
bits64 a1,
@@ -293,7 +293,7 @@ INLINE void
| pieces which are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
*----------------------------------------------------------------------------*/
INLINE void
static INLINE void
shortShift128Left(
bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr )
{
@@ -312,7 +312,7 @@ INLINE void
| `z1Ptr', and `z2Ptr'.
*----------------------------------------------------------------------------*/
INLINE void
static INLINE void
shortShift192Left(
bits64 a0,
bits64 a1,
@@ -347,7 +347,7 @@ INLINE void
| are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
*----------------------------------------------------------------------------*/
INLINE void
static INLINE void
add128(
bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 *z0Ptr, bits64 *z1Ptr )
{
@@ -367,7 +367,7 @@ INLINE void
| `z1Ptr', and `z2Ptr'.
*----------------------------------------------------------------------------*/
INLINE void
static INLINE void
add192(
bits64 a0,
bits64 a1,
@@ -405,7 +405,7 @@ INLINE void
| `z1Ptr'.
*----------------------------------------------------------------------------*/
INLINE void
static INLINE void
sub128(
bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 *z0Ptr, bits64 *z1Ptr )
{
@@ -423,7 +423,7 @@ INLINE void
| pointed to by `z0Ptr', `z1Ptr', and `z2Ptr'.
*----------------------------------------------------------------------------*/
INLINE void
static INLINE void
sub192(
bits64 a0,
bits64 a1,
@@ -459,7 +459,7 @@ INLINE void
| `z0Ptr' and `z1Ptr'.
*----------------------------------------------------------------------------*/
INLINE void mul64To128( bits64 a, bits64 b, bits64 *z0Ptr, bits64 *z1Ptr )
static INLINE void mul64To128( bits64 a, bits64 b, bits64 *z0Ptr, bits64 *z1Ptr )
{
bits32 aHigh, aLow, bHigh, bLow;
bits64 z0, zMiddleA, zMiddleB, z1;
@@ -489,7 +489,7 @@ INLINE void mul64To128( bits64 a, bits64 b, bits64 *z0Ptr, bits64 *z1Ptr )
| `z2Ptr'.
*----------------------------------------------------------------------------*/
INLINE void
static INLINE void
mul128By64To192(
bits64 a0,
bits64 a1,
@@ -517,7 +517,7 @@ INLINE void
| the locations pointed to by `z0Ptr', `z1Ptr', `z2Ptr', and `z3Ptr'.
*----------------------------------------------------------------------------*/
INLINE void
static INLINE void
mul128To256(
bits64 a0,
bits64 a1,
@@ -685,7 +685,7 @@ static int8 countLeadingZeros64( bits64 a )
| Otherwise, returns 0.
*----------------------------------------------------------------------------*/
INLINE flag eq128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 )
static INLINE flag eq128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 )
{
return ( a0 == b0 ) && ( a1 == b1 );
@@ -698,7 +698,7 @@ INLINE flag eq128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 )
| Otherwise, returns 0.
*----------------------------------------------------------------------------*/
INLINE flag le128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 )
static INLINE flag le128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 )
{
return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 <= b1 ) );
@@ -711,7 +711,7 @@ INLINE flag le128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 )
| returns 0.
*----------------------------------------------------------------------------*/
INLINE flag lt128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 )
static INLINE flag lt128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 )
{
return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 < b1 ) );
@@ -724,7 +724,7 @@ INLINE flag lt128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 )
| Otherwise, returns 0.
*----------------------------------------------------------------------------*/
INLINE flag ne128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 )
static INLINE flag ne128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 )
{
return ( a0 != b0 ) || ( a1 != b1 );

16
SoftFloat-Fish/SoftFloat-specialise.h
View File

@@ -67,7 +67,7 @@ typedef struct {
| otherwise returns 0.
*----------------------------------------------------------------------------*/
INLINE flag float32_is_nan( float32 a )
static INLINE flag float32_is_nan( float32 a )
{
return ( 0xFF000000 < (bits32) ( a<<1 ) );
}
@@ -77,7 +77,7 @@ INLINE flag float32_is_nan( float32 a )
| NaN; otherwise returns 0.
*----------------------------------------------------------------------------*/
INLINE flag float32_is_signaling_nan( float32 a )
static INLINE flag float32_is_signaling_nan( float32 a )
{
return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
}
@@ -104,7 +104,7 @@ static commonNaNT float32ToCommonNaN( void* ctx, float32 a )
| precision floating-point format.
*----------------------------------------------------------------------------*/
INLINE float32 commonNaNToFloat32( commonNaNT a )
static INLINE float32 commonNaNToFloat32( commonNaNT a )
{
return ( ( (bits32) a.sign )<<31 ) | 0x7FC00000 | ( a.high>>41 );
}
@@ -152,7 +152,7 @@ static float32 propagateFloat32NaN( void* ctx, float32 a, float32 b )
| otherwise returns 0.
*----------------------------------------------------------------------------*/
INLINE flag float64_is_nan( float64 a )
static INLINE flag float64_is_nan( float64 a )
{
return ( LIT64( 0xFFE0000000000000 ) < (bits64) ( a<<1 ) );
}
@@ -162,7 +162,7 @@ INLINE flag float64_is_nan( float64 a )
| NaN; otherwise returns 0.
*----------------------------------------------------------------------------*/
INLINE flag float64_is_signaling_nan( float64 a )
static INLINE flag float64_is_signaling_nan( float64 a )
{
return
( ( ( a>>51 ) & 0xFFF ) == 0xFFE )
@@ -191,7 +191,7 @@ static commonNaNT float64ToCommonNaN( void* ctx, float64 a )
| precision floating-point format.
*----------------------------------------------------------------------------*/
INLINE float64 commonNaNToFloat64( commonNaNT a )
static INLINE float64 commonNaNToFloat64( commonNaNT a )
{
return
( ( (bits64) a.sign )<<63 )
@@ -246,7 +246,7 @@ static float64 propagateFloat64NaN( void* ctx, float64 a, float64 b )
| otherwise returns 0.
*----------------------------------------------------------------------------*/
INLINE flag float128_is_nan( float128 a )
static INLINE flag float128_is_nan( float128 a )
{
return
( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) )
@@ -258,7 +258,7 @@ INLINE flag float128_is_nan( float128 a )
| signaling NaN; otherwise returns 0.
*----------------------------------------------------------------------------*/
INLINE flag float128_is_signaling_nan( float128 a )
static INLINE flag float128_is_signaling_nan( float128 a )
{
return
( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )

26
SoftFloat-Fish/SoftFloat.c
View File

@@ -175,7 +175,7 @@ static int64 roundAndPackInt64( void* ctx, flag zSign, bits64 absZ0, bits64 absZ
| Returns the fraction bits of the single-precision floating-point value `a'.
*----------------------------------------------------------------------------*/
INLINE bits32 extractFloat32Frac( float32 a )
static INLINE bits32 extractFloat32Frac( float32 a )
{
return a & 0x007FFFFF;
@@ -186,7 +186,7 @@ INLINE bits32 extractFloat32Frac( float32 a )
| Returns the exponent bits of the single-precision floating-point value `a'.
*----------------------------------------------------------------------------*/
INLINE int16 extractFloat32Exp( float32 a )
static INLINE int16 extractFloat32Exp( float32 a )
{
return ( a>>23 ) & 0xFF;
@@ -197,7 +197,7 @@ INLINE int16 extractFloat32Exp( float32 a )
| Returns the sign bit of the single-precision floating-point value `a'.
*----------------------------------------------------------------------------*/
INLINE flag extractFloat32Sign( float32 a )
static INLINE flag extractFloat32Sign( float32 a )
{
return a>>31;
@@ -233,7 +233,7 @@ static void
| significand.
*----------------------------------------------------------------------------*/
INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig )
static INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig )
{
return ( ( (bits32) zSign )<<31 ) + ( ( (bits32) zExp )<<23 ) + zSig;
@@ -337,7 +337,7 @@ static float32
| Returns the fraction bits of the double-precision floating-point value `a'.
*----------------------------------------------------------------------------*/
INLINE bits64 extractFloat64Frac( float64 a )
static INLINE bits64 extractFloat64Frac( float64 a )
{
return a & LIT64( 0x000FFFFFFFFFFFFF );
@@ -348,7 +348,7 @@ INLINE bits64 extractFloat64Frac( float64 a )
| Returns the exponent bits of the double-precision floating-point value `a'.
*----------------------------------------------------------------------------*/
INLINE int16 extractFloat64Exp( float64 a )
static INLINE int16 extractFloat64Exp( float64 a )
{
return ( a>>52 ) & 0x7FF;
@@ -359,7 +359,7 @@ INLINE int16 extractFloat64Exp( float64 a )
| Returns the sign bit of the double-precision floating-point value `a'.
*----------------------------------------------------------------------------*/
INLINE flag extractFloat64Sign( float64 a )
static INLINE flag extractFloat64Sign( float64 a )
{
return a>>63;
@@ -395,7 +395,7 @@ static void
| significand.
*----------------------------------------------------------------------------*/
INLINE float64 packFloat64( flag zSign, int16 zExp, bits64 zSig )
static INLINE float64 packFloat64( flag zSign, int16 zExp, bits64 zSig )
{
return ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<52 ) + zSig;
@@ -502,7 +502,7 @@ static float64
| floating-point value `a'.
*----------------------------------------------------------------------------*/
INLINE bits64 extractFloat128Frac1( float128 a )
static INLINE bits64 extractFloat128Frac1( float128 a )
{
return a.low;
@@ -514,7 +514,7 @@ INLINE bits64 extractFloat128Frac1( float128 a )
| floating-point value `a'.
*----------------------------------------------------------------------------*/
INLINE bits64 extractFloat128Frac0( float128 a )
static INLINE bits64 extractFloat128Frac0( float128 a )
{
return a.high & LIT64( 0x0000FFFFFFFFFFFF );
@@ -526,7 +526,7 @@ INLINE bits64 extractFloat128Frac0( float128 a )
| `a'.
*----------------------------------------------------------------------------*/
INLINE int32 extractFloat128Exp( float128 a )
static INLINE int32 extractFloat128Exp( float128 a )
{
return ( a.high>>48 ) & 0x7FFF;
@@ -537,7 +537,7 @@ INLINE int32 extractFloat128Exp( float128 a )
| Returns the sign bit of the quadruple-precision floating-point value `a'.
*----------------------------------------------------------------------------*/
INLINE flag extractFloat128Sign( float128 a )
static INLINE flag extractFloat128Sign( float128 a )
{
return a.high>>63;
@@ -598,7 +598,7 @@ static void
| significand.
*----------------------------------------------------------------------------*/
INLINE float128
static INLINE float128
packFloat128( flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 )
{
float128 z;

6
SoftFloat-Fish/SoftFloat.h
View File

@@ -135,7 +135,7 @@ char float32_lt( void* ctx, float32, float32 );
char float32_eq_signaling( void* ctx, float32, float32 );
char float32_le_quiet( void* ctx, float32, float32 );
char float32_lt_quiet( void* ctx, float32, float32 );
INLINE char float32_is_signaling_nan( float32 );
static INLINE char float32_is_signaling_nan( float32 );
/*----------------------------------------------------------------------------
| Software IEC/IEEE double-precision conversion routines.
@@ -165,7 +165,7 @@ char float64_lt( void* ctx, float64, float64 );
char float64_eq_signaling( void* ctx, float64, float64 );
char float64_le_quiet( void* ctx, float64, float64 );
char float64_lt_quiet( void* ctx, float64, float64 );
INLINE char float64_is_signaling_nan( float64 );
static INLINE char float64_is_signaling_nan( float64 );
#ifdef FLOAT128
@@ -195,7 +195,7 @@ char float128_lt( void* ctx, float128, float128 );
char float128_eq_signaling( void* ctx, float128, float128 );
char float128_le_quiet( void* ctx, float128, float128 );
char float128_lt_quiet( void* ctx, float128, float128 );
INLINE char float128_is_signaling_nan( float128 );
static INLINE char float128_is_signaling_nan( float128 );
#endif