mirror of
https://github.com/SDL-Hercules-390/hyperion.git
synced 2026-04-15 08:25:31 +02:00
125 lines
5.2 KiB
Plaintext
125 lines
5.2 KiB
Plaintext
* CGER test
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sysclear
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archmode esame
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r 1a0=00000001800000000000000000000200 # z/Arch restart PSW
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r 1d0=00020001800000000000000000BADBAD # z/Arch pgm new PSW
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r 200=B7000330 # LCTL R0,R0,CTLR0 Set CR0 bit 45
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r 204=B29D0334 # LFPC FPCREG Load FPC register
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r 208=41000008 # LA R0,8 R0=Number of test data
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r 20C=41100800 # LA R1,TEST1 R1=>Test data table
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r 210=41F00900 # LA R15,RES1 R15=>Result table
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r 214=78401000 #A LE F4,0(,R1) Load FPR4=TESTn
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r 218=41200000 # LA R2,X'00' R2=Rounding mode
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r 21C=42200222 #B STC R2,I+2 Store rounding mode into instr
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r 220=B3C80074 #I CGER R7,0,F4 Convert FPR4 into R7
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r 224=B2220080 # IPM R8 R8=Cond code and pgm mask
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r 228=5890008C # L R9,PGMINTC R9=PGM check interrupt code
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r 22C=E370F0000024 # STG R7,0(,R15) Store R7 in result table
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r 232=9089F008 # STM R8,R9,8(R15) Store CC and PIC in table
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r 236=41F0F010 # LA R15,16(,R15) R15=>next result table
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r 23A=EC270005107F # CLIJNE R2,X'10',*+10 Skip if not rounding mode 1
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r 240=41202020 # LA R2,X'20'(R2) Bypass rounding modes 2 and 3
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r 244=41202010 # LA R2,X'10'(R2) R2=Next rounding mode
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r 248=EC24021C80FF # CLIBL R2,X'80',B Loop if rounding mode less than 8
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r 24E=41101004 # LA R1,4(,R1) R1=>Next TESTn
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r 252=46000214 # BCT R0,A Loop to end of TEST table
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r 256=41000900 # LA R0,RES1 R0->Actual results
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r 25A=41100300 # LA R1,48*16 R1=Length of results table
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r 25E=41200C00 # LA R2,EXP1 R2->Expected results
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r 262=41300300 # LA R3,48*16 R3=Length of results table
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r 266=0F02 # CLCL R0,R2 Compare with expected results
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r 268=477002FC # BNE DIE Error if not equal
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r 26C=B2B20300 # LPSWE WAITPSW Load enabled wait PSW
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r 2FC=B2B20310 # LPSWE DISWAIT Load disabled wait PSW
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r 300=07020001800000000000000000AAAAAA # WAITPSW Enabled wait state PSW
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r 310=00020001800000000000000000BADBAD # DISWAIT Disabled wait state PSW
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r 320=00000001800000000000000000000340 # NEWPSWI New PSW for PGMFLIH
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r 330=00040000 # CTLR0 Control register 0 (bit45 AFP control)
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r 334=00000000 # FPCREG Floating point control register
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r 340=B2B20150 #PGMFLIH LPSWE PGMOPSW Program check interrupt handler
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r 800=D0800000 # TEST1 DC EH'-9223372036854775808'
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r 804=D07FFFFF # TEST2 DC EH'-9223370937343148032'
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r 808=C27B8000 # TEST3 DC EH'-123.5'
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r 80C=80000000 # TEST4 DC EH'-0'
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r 810=427A8000 # TEST5 DC EH'122.5'
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r 814=487FFFFF # TEST6 DC EH'2147483392'
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r 818=507FFFFF # TEST7 DC EH'9223370937343148032'
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r 81C=50800000 # TEST8 DC EH'9223372036854775808'
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* Expected results - TEST1
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r C00=80000000000000001000000000000000
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r C10=80000000000000001000000000000000
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r C20=80000000000000001000000000000000
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r C30=80000000000000001000000000000000
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r C40=80000000000000001000000000000000
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r C50=80000000000000001000000000000000
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* Expected results - TEST2
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r C60=80000100000000001000000000000000
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r C70=80000100000000001000000000000000
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r C80=80000100000000001000000000000000
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r C90=80000100000000001000000000000000
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r CA0=80000100000000001000000000000000
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r CB0=80000100000000001000000000000000
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* Expected results - TEST3
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r CC0=FFFFFFFFFFFFFF851000000000000000
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r CD0=FFFFFFFFFFFFFF841000000000000000
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r CE0=FFFFFFFFFFFFFF841000000000000000
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r CF0=FFFFFFFFFFFFFF851000000000000000
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r D00=FFFFFFFFFFFFFF851000000000000000
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r D10=FFFFFFFFFFFFFF841000000000000000
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* Expected results - TEST4
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r D20=00000000000000000000000000000000
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r D30=00000000000000000000000000000000
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r D40=00000000000000000000000000000000
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r D50=00000000000000000000000000000000
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r D60=00000000000000000000000000000000
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r D70=00000000000000000000000000000000
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* Expected results - TEST5
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r D80=000000000000007A2000000000000000
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r D90=000000000000007B2000000000000000
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r DA0=000000000000007A2000000000000000
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r DB0=000000000000007A2000000000000000
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r DC0=000000000000007B2000000000000000
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r DD0=000000000000007A2000000000000000
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* Expected results - TEST6
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r DE0=000000007FFFFF002000000000000000
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r DF0=000000007FFFFF002000000000000000
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r E00=000000007FFFFF002000000000000000
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r E10=000000007FFFFF002000000000000000
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r E20=000000007FFFFF002000000000000000
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r E30=000000007FFFFF002000000000000000
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* Expected results - TEST7
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r E40=7FFFFF00000000002000000000000000
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r E50=7FFFFF00000000002000000000000000
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r E60=7FFFFF00000000002000000000000000
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r E70=7FFFFF00000000002000000000000000
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r E80=7FFFFF00000000002000000000000000
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r E90=7FFFFF00000000002000000000000000
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* Expected results - TEST8
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r EA0=7FFFFFFFFFFFFFFF3000000000000000
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r EB0=7FFFFFFFFFFFFFFF3000000000000000
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r EC0=7FFFFFFFFFFFFFFF3000000000000000
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r ED0=7FFFFFFFFFFFFFFF3000000000000000
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r EE0=7FFFFFFFFFFFFFFF3000000000000000
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r EF0=7FFFFFFFFFFFFFFF3000000000000000
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ostailor null
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restart
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pause 1
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* Display test data
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r 800.20
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* Display results - TEST1
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r 900.60
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* Display results - TEST2
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r 960.60
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* Display results - TEST3
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r 9C0.60
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* Display results - TEST4
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r A20.60
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* Display results - TEST5
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r A80.60
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* Display results - TEST6
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r AE0.60
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* Display results - TEST7
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r B40.60
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* Display results - TEST8
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r BA0.60
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