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https://github.com/SDL-Hercules-390/hyperion.git
synced 2026-04-21 03:12:58 +02:00
Corrections to SQBS/EQBS
This commit is contained in:
63
qdio.c
63
qdio.c
@@ -174,16 +174,17 @@ int r1, r3; /* Register numbers */
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int b2; /* effective address base */
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VADR effective_addr2; /* effective address */
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DEVBLK *dev; /* Data device DEVBLK */
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OSA_GRP *grp; /* OSA Group device structure */
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BYTE state; /* Target buffer state */
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BYTE oldstate; /* Current buffer state */
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BYTE nextstate; /* Next buffer's state */
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U32 queues; /* Total number of queues */
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U32 count; /* Number of buffers to set */
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U32 qndx; /* Queue index */
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U32 qidx; /* Queue index */
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U32 bidx; /* SLSB buffer state index */
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U64 slsba; /* Storage list state block address */
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DEVBLK *dev; /* Data device DEVBLK */
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OSA_GRP *grp; /* OSA Group device structure */
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RSY(inst, regs, r1, r3, b2, effective_addr2);
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@@ -229,39 +230,38 @@ OSA_GRP *grp; /* OSA Group device structure */
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/* Locate the group device block */
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grp = (OSA_GRP*)dev->group->grp_data;
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qndx = regs->GR_H(r1); /* Queue index */
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qidx = regs->GR_H(r1); /* Queue index */
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bidx = regs->GR_L(r1); /* Buffer index */
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count = regs->GR_L(r3) < 128 ? regs->GR_L(r3) : 128; /* Number of buffer */
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count = regs->GR_L(r3) < 128 ? regs->GR_L(r3) : 128; /* Number of buffers */
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state = effective_addr2 & 0xFF;
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queues = (U32)(grp->i_qcnt + grp->o_qcnt); /* Calculate number of queues */
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queues = (U32)(grp->i_qcnt + grp->o_qcnt);
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if ( (qndx >= queues) || (bidx > 127) )
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if ( (qidx >= queues) || (bidx > 127) )
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ARCH_DEP(program_interrupt) (regs, PGM_SPECIFICATION_EXCEPTION);
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if (qndx < (U32)grp->i_qcnt)
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slsba = grp->i_slsbla[qndx];
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if (qidx < (U32)grp->i_qcnt)
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slsba = grp->i_slsbla[qidx];
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else
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slsba = grp->o_slsbla[qndx - grp->i_qcnt];
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slsba = grp->o_slsbla[qidx - grp->i_qcnt];
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oldstate = nextstate = ARCH_DEP(wfetchb)((VADR)(slsba+bidx), USE_REAL_ADDR, regs);
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while (count && oldstate == nextstate)
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{
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/* set the new state */
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ARCH_DEP(wstoreb)(state, (VADR)(slsba+bidx), USE_REAL_ADDR, regs);
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bidx++; bidx &= 0x7F; /* Advance and wrap index */
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bidx++; bidx &= 0x7F; /* Advance and wrap index */
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count--;
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if(!count)
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if(count)
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nextstate = ARCH_DEP(wfetchb)((VADR)(slsba+bidx), USE_REAL_ADDR, regs);
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}
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regs->GR_L(r1) = bidx; /* Return the next unchanged buffer state index */
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regs->GR_L(r3) = count; /* Return the number of unchanged buffers */
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regs->GR_H(r3) = !count || state == nextstate ? 0 : 0x20;
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regs->GR_L(r1) = bidx; /* Return buffer state index */
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regs->GR_L(r3) = count; /* Return number of unchanged buffers */
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regs->GR_H(r3) = !count || oldstate == nextstate ? 0 : 0x20;
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regs->psw.cc = 0;
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return;
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@@ -276,16 +276,17 @@ DEF_INST(extract_queue_buffer_state)
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int r1, r2, r3, m4; /* Register numbers */
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VADR effective_addr2 = 0; /* effective address */
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int autoack; /* flag for auto-acknowkledgement */
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DEVBLK *dev; /* Data device DEVBLK */
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OSA_GRP *grp; /* OSA Group device structure */
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int autoack; /* Flag for auto-acknowkledgement */
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BYTE state; /* State extracted from first buffer */
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BYTE nextstate; /* next buffer */
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U32 queues; /* Total number of queues */
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U32 count; /* Number of buffers to set */
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U32 qndx; /* Queue index */
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U32 qidx; /* Queue index */
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U32 bidx; /* SLSB buffer state index */
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U64 slsba; /* Storage list state block address */
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DEVBLK *dev; /* Data device DEVBLK */
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OSA_GRP *grp; /* OSA Group device structure */
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RRF_RM(inst, regs, r1, r2, r3, m4);
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@@ -331,20 +332,20 @@ OSA_GRP *grp; /* OSA Group device structure */
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/* Locate the group device block */
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grp = (OSA_GRP*)dev->group->grp_data;
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qndx = regs->GR_H(r1); /* Queue index */
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bidx = regs->GR_L(r1); /* Buffer index */
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autoack = (regs->GR_H(r2) & 0x80000000ULL);
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qidx = regs->GR_H(r1); /* Queue index */
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bidx = regs->GR_L(r1); /* Buffer index */
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autoack = (regs->GR_H(r2) & 0x80000000);
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count = regs->GR_L(r3) < 128 ? regs->GR_L(r3) : 128; /* Number of buffers */
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queues = (U32)(grp->i_qcnt + grp->o_qcnt); /* Calculate number of queues */
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queues = (U32)(grp->i_qcnt + grp->o_qcnt);
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if ( (qndx >= queues) || (bidx > 127) )
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if ( (qidx >= queues) || (bidx > 127) )
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ARCH_DEP(program_interrupt) (regs, PGM_SPECIFICATION_EXCEPTION);
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if (qndx < (U32)grp->i_qcnt)
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slsba = grp->i_slsbla[qndx];
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if (qidx < (U32)grp->i_qcnt)
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slsba = grp->i_slsbla[qidx];
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else
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slsba = grp->o_slsbla[qndx - grp->i_qcnt];
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slsba = grp->o_slsbla[qidx - grp->i_qcnt];
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state = nextstate = ARCH_DEP(wfetchb)((VADR)(slsba+bidx), USE_REAL_ADDR, regs);
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@@ -358,17 +359,19 @@ OSA_GRP *grp; /* OSA Group device structure */
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(SLSBE_INPUT_ACKED, (VADR)(slsba+bidx), USE_REAL_ADDR, regs);
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break;
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#if 0
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case SLSBE_OUTPUT_COMPLETED:
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ARCH_DEP(wstoreb)
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(SLSBE_OUTPUT_PRIMED, (VADR)(slsba+bidx), USE_REAL_ADDR, regs);
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break;
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#endif
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}
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bidx++; bidx &= 0x7F; /* Advance and wrap index buffer */
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bidx++; bidx &= 0x7F; /* Advance and wrap index */
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count--;
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if(!count)
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if(count)
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nextstate = ARCH_DEP(wfetchb)((VADR)(slsba+bidx), USE_REAL_ADDR, regs);
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}
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