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Fix incorrect registers when cc=1 for TRTE,TRTRE

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git-svn-id: file:///home/jj/hercules.svn/trunk@4679 956126f8-22a0-4046-8f4a-272fa8102e63
This commit is contained in:
Roger Bowler
2008-03-28 13:36:25 +00:00
parent 1c51c63f52
commit dde2748896
3 changed files with 76 additions and 13 deletions
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3
CHANGES
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@@ -1,3 +1,4 @@
28 Mar 2008 Fix incorrect registers when cc=1 for TRTE,TRTRE - Roger Bowler
28 Mar 2008 Add generic, readblkid, locateblk tape media handler vectors - Fish
28 Mar 2008 SCSI --blkid-24 option - Fish
23 Mar 2008 Fix incorrect bit selection for RNSBG,RISBG,ROSBG,RXSBG - Roger Bowler
@@ -11,7 +12,7 @@
04 Mar 2008 Fix CFC cond code - fetch right operand size - Paul Leisy
04 Mar 2008 LEGACYSENSEID config stmt added - see hercconf.html - Ivan Warren
03 Mar 2008 Fix BSM/BASSM mode switch trace - Paul Leisy
02 Mar 2008 re-disable SenseID on 8809,3410,3420 (breaks MTS) - Ivan Warren
02 Mar 2008 re-disable SenseID on 8809,3410,3420 (breaks MTS) - Ivan Warren
29 Feb 2008 Fix TRAP in z/arch mode - Paul Leisy
29 Feb 2008 Added feature parsing_enhancement_facility - Bernard
28 Feb 2008 Fix RP in z/arch mode and mode switch trace - Paul Leisy

47
general2.c
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@@ -32,6 +32,9 @@
/*-------------------------------------------------------------------*/
// $Log$
// Revision 1.125 2008/03/27 16:45:17 rbowler
// TRTE and TRTRE incorrectly return cc=3
//
// Revision 1.124 2008/03/06 16:10:35 rbowler
// Remove extraneous trailing blanks (cosmetic change only)
//
@@ -2776,16 +2779,10 @@ DEF_INST(translate_and_test_extended)
if(a_bit)
{
arg_ch = ARCH_DEP(vfetch2)(buf_addr, r1, regs);
buf_len -= 2;
processed += 2;
buf_addr = (buf_addr + 2) & ADDRESS_MAXWRAP(regs);
}
else
{
arg_ch = ARCH_DEP(vfetchb)(buf_addr, r1, regs);
buf_len--;
processed++;
buf_addr = (buf_addr + 1) & ADDRESS_MAXWRAP(regs);
}
if(l_bit && arg_ch > 255)
@@ -2797,6 +2794,22 @@ DEF_INST(translate_and_test_extended)
else
fc = ARCH_DEP(vfetchb)((fct_addr + arg_ch) & ADDRESS_MAXWRAP(regs), 1, regs);
}
if(!fc)
{
if(a_bit)
{
buf_len -= 2;
processed += 2;
buf_addr = (buf_addr + 2) & ADDRESS_MAXWRAP(regs);
}
else
{
buf_len--;
processed++;
buf_addr = (buf_addr + 1) & ADDRESS_MAXWRAP(regs);
}
}
}
/* Commit registers */
@@ -2860,16 +2873,10 @@ DEF_INST(translate_and_test_reverse_extended)
if(a_bit)
{
arg_ch = ARCH_DEP(vfetch2)(buf_addr, r1, regs);
buf_len -= 2;
processed += 2;
buf_addr = (buf_addr - 2) & ADDRESS_MAXWRAP(regs);
}
else
{
arg_ch = ARCH_DEP(vfetchb)(buf_addr, r1, regs);
buf_len--;
processed++;
buf_addr = (buf_addr - 1) & ADDRESS_MAXWRAP(regs);
}
if(l_bit && arg_ch > 255)
@@ -2881,6 +2888,22 @@ DEF_INST(translate_and_test_reverse_extended)
else
fc = ARCH_DEP(vfetchb)((fct_addr + arg_ch) & ADDRESS_MAXWRAP(regs), 1, regs);
}
if(!fc)
{
if(a_bit)
{
buf_len -= 2;
processed += 2;
buf_addr = (buf_addr - 2) & ADDRESS_MAXWRAP(regs);
}
else
{
buf_len--;
processed++;
buf_addr = (buf_addr - 1) & ADDRESS_MAXWRAP(regs);
}
}
}
/* Commit registers */

39
tests/trte.txt Normal file
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@@ -0,0 +1,39 @@
* TRTE test $Id$
sysclear
archmode esame
r 1a0=00000000800000000000000000000200 # z/Arch restart PSW
r 1d0=0002000080000000000000000000DEAD # z/Arch pgm new PSW
r 200=C018A5A5A5A5 # IIHF R1,X'A5A5A5A5' Load garbage in R1 bits 0-31
r 206=B9040061 # LGR R6,R1 Propagate garbage into R6
r 20A=B9040071 # LGR R7,R1 Propagate garbage into R7
r 20E=B9040081 # LGR R8,R1 Propagate garbage into R8
r 212=C089A5A5A5A5 # IILF R8,X'A5A5A5A5' Load garbage in R8 bits 32-63
r 218=41100300 # LA R1,TABLE1 R1=>Translate table
r 21C=41600280 # LA R6,DATA1 R6=>Test data
r 220=41700006 # LA R7,L'DATA1 R7=>Length of test data
r 224=B9BF0068 # TRTE R6,R8 Translate and test single
r 228=A734FFFE # BRC 3,*-4 Repeat if more data
r 22C=B2B20270 # LPSWE WAITPSW Load enabled wait PSW
r 270=07020001800000000000000000FED0D0 # WAITPSW Enabled wait state PSW
* Test data
r 280=F1F2F3F4E7F6 # DATA1 DC C'1234X6'
r 300=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF # TABLE1 DC 240X'FF',10X'00',6X'FF'
r 310=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 320=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 330=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 340=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 350=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 360=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 370=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 380=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 390=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 3A0=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 3B0=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 3C0=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 3D0=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 3E0=FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
r 3F0=00000000000000000000FFFFFFFFFFFF
ostailor null
s+
pgmtrace +7
restart