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Instruction decoders cleanup part 4: fix RRD snafu:

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Deleted "RRF_R" decoder and changed all instructions using it to use the "RRD" decoder instead. The Important Programming Note in instfmts.h header has been updated appropriately and re-titled to be a simple Historical Programming Note instead.
This commit is contained in:
Fish (David B. Trout)
2020-03-12 15:59:13 -07:00
parent aa24c44b27
commit e899a610f0
3 changed files with 44 additions and 52 deletions
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float.c
+20 -20
View File
@@ -7067,7 +7067,7 @@ int i1; /* Index of R1 in fpr array */
#if defined(FEATURE_020_HFP_MULT_ADD_SUB_FACILITY)
/*-------------------------------------------------------------------*/
/* B32E MAER - Multiply and Add Floating Point Short Register [RRF] */
/* B32E MAER - Multiply and Add Floating Point Short Register [RRD] */
/*-------------------------------------------------------------------*/
DEF_INST(multiply_add_float_short_reg)
{
@@ -7076,7 +7076,7 @@ int i1; /* Index of R1 in fpr array */
SHORT_FLOAT fl1, fl2, fl3;
int pgm_check;
RRF_R(inst, regs, r1, r2, r3);
RRD(inst, regs, r1, r2, r3);
HFPREG2_CHECK(r1, r2, regs);
HFPREG_CHECK(r3, regs);
i1 = FPR2I(r1);
@@ -7104,7 +7104,7 @@ int pgm_check;
/*-------------------------------------------------------------------*/
/* B32F MSER - Multiply and Subtract Floating Point Short Reg [RRF] */
/* B32F MSER - Multiply and Subtract Floating Point Short Reg [RRD] */
/*-------------------------------------------------------------------*/
DEF_INST(multiply_subtract_float_short_reg)
{
@@ -7113,7 +7113,7 @@ int i1; /* Index of R1 in fpr array */
SHORT_FLOAT fl1, fl2, fl3;
int pgm_check;
RRF_R(inst, regs, r1, r2, r3);
RRD(inst, regs, r1, r2, r3);
HFPREG2_CHECK(r1, r2, regs);
HFPREG_CHECK(r3, regs);
i1 = FPR2I(r1);
@@ -7144,7 +7144,7 @@ int pgm_check;
/*-------------------------------------------------------------------*/
/* B33E MADR - Multiply and Add Floating Point Long Register [RRF] */
/* B33E MADR - Multiply and Add Floating Point Long Register [RRD] */
/*-------------------------------------------------------------------*/
DEF_INST(multiply_add_float_long_reg)
{
@@ -7153,7 +7153,7 @@ int i1; /* Index of R1 in fpr array */
LONG_FLOAT fl1, fl2, fl3;
int pgm_check;
RRF_R(inst, regs, r1, r2, r3);
RRD(inst, regs, r1, r2, r3);
HFPREG2_CHECK(r1, r2, regs);
HFPREG_CHECK(r3, regs);
i1 = FPR2I(r1);
@@ -7181,7 +7181,7 @@ int pgm_check;
/*-------------------------------------------------------------------*/
/* B33F MSDR - Multiply and Subtract Floating Point Long Reg [RRF] */
/* B33F MSDR - Multiply and Subtract Floating Point Long Reg [RRD] */
/*-------------------------------------------------------------------*/
DEF_INST(multiply_subtract_float_long_reg)
{
@@ -7190,7 +7190,7 @@ int i1; /* Index of R1 in fpr array */
LONG_FLOAT fl1, fl2, fl3;
int pgm_check;
RRF_R(inst, regs, r1, r2, r3);
RRD(inst, regs, r1, r2, r3);
HFPREG2_CHECK(r1, r2, regs);
HFPREG_CHECK(r3, regs);
i1 = FPR2I(r1);
@@ -7382,7 +7382,7 @@ int pgm_check;
#if defined(FEATURE_023_HFP_UNNORM_EXT_FACILITY)
/*-------------------------------------------------------------------*/
/* B338 MAYLR - Multiply and Add Unnorm. Long to Ext. Low Reg. [RRF] */
/* B338 MAYLR - Multiply and Add Unnorm. Long to Ext. Low Reg. [RRD] */
/*-------------------------------------------------------------------*/
DEF_INST(multiply_add_unnormal_float_long_to_ext_low_reg)
{
@@ -7394,7 +7394,7 @@ EXTENDED_FLOAT fxp1; /* Intermediate product */
EXTENDED_FLOAT fxadd; /* Addend in extended format */
EXTENDED_FLOAT fxres; /* Extended result */
RRF_R(inst, regs, r1, r2, r3)
RRD(inst, regs, r1, r2, r3)
HFPREG2_CHECK(r2, r3, regs);
HFPREG_CHECK(r1, regs);
i1 = FPR2I(r1);
@@ -7421,7 +7421,7 @@ EXTENDED_FLOAT fxres; /* Extended result */
/*-------------------------------------------------------------------*/
/* B339 MYLR - Multiply Unnormalized Long to Ext. Low FP Reg. [RRF] */
/* B339 MYLR - Multiply Unnormalized Long to Ext. Low FP Reg. [RRD] */
/*-------------------------------------------------------------------*/
DEF_INST(multiply_unnormal_float_long_to_ext_low_reg)
{
@@ -7429,7 +7429,7 @@ int r1, r2, r3; /* Values of R fields */
LONG_FLOAT fl2, fl3; /* Multiplier/Multiplicand */
EXTENDED_FLOAT fx1; /* Intermediate result */
RRF_R(inst, regs, r1, r2, r3);
RRD(inst, regs, r1, r2, r3);
HFPREG2_CHECK(r2, r3, regs);
HFPREG_CHECK(r1, regs);
@@ -7447,7 +7447,7 @@ EXTENDED_FLOAT fx1; /* Intermediate result */
/*-------------------------------------------------------------------*/
/* B33A MAYR - Multiply and Add Unnorm. Long to Ext. Reg. [RRF] */
/* B33A MAYR - Multiply and Add Unnorm. Long to Ext. Reg. [RRD] */
/*-------------------------------------------------------------------*/
DEF_INST(multiply_add_unnormal_float_long_to_ext_reg)
{
@@ -7458,7 +7458,7 @@ EXTENDED_FLOAT fxp1; /* Intermediate product */
EXTENDED_FLOAT fxadd; /* Addend in extended format */
EXTENDED_FLOAT fxres; /* Extended result */
RRF_R(inst, regs, r1, r2, r3);
RRD(inst, regs, r1, r2, r3);
HFPREG2_CHECK(r2, r3, regs);
HFPREG_CHECK(r1, regs);
/* Either the low- or high-numbered register of a pair is valid */
@@ -7485,7 +7485,7 @@ EXTENDED_FLOAT fxres; /* Extended result */
/*-------------------------------------------------------------------*/
/* B33B MYR - Multiply Unnormalized Long to Extended Reg [RRF] */
/* B33B MYR - Multiply Unnormalized Long to Extended Reg [RRD] */
/*-------------------------------------------------------------------*/
DEF_INST(multiply_unnormal_float_long_to_ext_reg)
{
@@ -7493,7 +7493,7 @@ int r1, r2, r3; /* Values of R fields */
LONG_FLOAT fl2, fl3; /* Multiplier/Multiplicand */
EXTENDED_FLOAT fx1; /* Intermediate result */
RRF_R(inst, regs, r1, r2, r3);
RRD(inst, regs, r1, r2, r3);
HFPODD_CHECK(r1, regs);
HFPREG2_CHECK(r2, r3, regs);
@@ -7511,7 +7511,7 @@ EXTENDED_FLOAT fx1; /* Intermediate result */
/*-------------------------------------------------------------------*/
/* B33C MAYHR - Multiply and Add Unnorm. Long to Ext. High Reg [RRF] */
/* B33C MAYHR - Multiply and Add Unnorm. Long to Ext. High Reg [RRD] */
/*-------------------------------------------------------------------*/
DEF_INST(multiply_add_unnormal_float_long_to_ext_high_reg)
{
@@ -7523,7 +7523,7 @@ EXTENDED_FLOAT fxp1; /* Intermediate product */
EXTENDED_FLOAT fxadd; /* Addend in extended format */
EXTENDED_FLOAT fxres; /* Extended result */
RRF_R(inst, regs, r1, r2, r3);
RRD(inst, regs, r1, r2, r3);
HFPREG2_CHECK(r2, r3, regs);
HFPREG_CHECK(r1, regs);
i1 = FPR2I(r1);
@@ -7549,7 +7549,7 @@ EXTENDED_FLOAT fxres; /* Extended result */
/*-------------------------------------------------------------------*/
/* B33D MYHR - Multiply Unnormalized Long to Ext. High FP Reg[RRF] */
/* B33D MYHR - Multiply Unnormalized Long to Ext. High FP Reg[RRD] */
/*-------------------------------------------------------------------*/
DEF_INST(multiply_unnormal_float_long_to_ext_high_reg)
{
@@ -7557,7 +7557,7 @@ int r1, r2, r3; /* Values of R fields */
LONG_FLOAT fl2, fl3; /* Multiplier/Multiplicand */
EXTENDED_FLOAT fx1; /* Intermediate result */
RRF_R(inst, regs, r1, r2, r3);
RRD(inst, regs, r1, r2, r3);
HFPODD_CHECK(r1, regs);
HFPREG2_CHECK(r2, r3, regs);
ieee.c
+8 -8
View File
@@ -3886,7 +3886,7 @@ DEF_INST(multiply_bfp_short)
}
/*-------------------------------------------------------------------*/
/* B31E MADBR - MULTIPLY AND ADD (long BFP) [RRF] */
/* B31E MADBR - MULTIPLY AND ADD (long BFP) [RRD] */
/*-------------------------------------------------------------------*/
DEF_INST(multiply_add_bfp_long_reg)
{
@@ -3894,7 +3894,7 @@ DEF_INST(multiply_add_bfp_long_reg)
float64_t op1, op2, op3, ans;
U32 ieee_trap_conds =0;
RRF_R(inst, regs, r1, r2, r3);
RRD(inst, regs, r1, r2, r3);
BFPINST_CHECK(regs);
GET_FLOAT64_OPS( op1, r1, op3, r3, regs );
GET_FLOAT64_OP( op2, r2, regs );
@@ -3950,7 +3950,7 @@ DEF_INST(multiply_add_bfp_long)
}
/*-------------------------------------------------------------------*/
/* B30E MAEBR - MULTIPLY AND ADD (short BFP) [RRF] */
/* B30E MAEBR - MULTIPLY AND ADD (short BFP) [RRD] */
/*-------------------------------------------------------------------*/
DEF_INST(multiply_add_bfp_short_reg)
{
@@ -3958,7 +3958,7 @@ DEF_INST(multiply_add_bfp_short_reg)
float32_t op1, op2, op3, ans;
U32 ieee_trap_conds =0;
RRF_R(inst, regs, r1, r2, r3);
RRD(inst, regs, r1, r2, r3);
BFPINST_CHECK(regs);
GET_FLOAT32_OPS( op1, r1, op3, r3, regs );
GET_FLOAT32_OP( op2, r2, regs );
@@ -4014,7 +4014,7 @@ DEF_INST(multiply_add_bfp_short)
}
/*-------------------------------------------------------------------*/
/* B31F MSDBR - MULTIPLY AND SUBTRACT (long BFP) [RRF] */
/* B31F MSDBR - MULTIPLY AND SUBTRACT (long BFP) [RRD] */
/*-------------------------------------------------------------------*/
DEF_INST(multiply_subtract_bfp_long_reg)
{
@@ -4022,7 +4022,7 @@ DEF_INST(multiply_subtract_bfp_long_reg)
float64_t op1, op2, op3, ans;
U32 ieee_trap_conds =0;
RRF_R(inst, regs, r1, r2, r3);
RRD(inst, regs, r1, r2, r3);
BFPINST_CHECK(regs);
GET_FLOAT64_OPS( op1, r1, op3, r3, regs );
GET_FLOAT64_OP( op2, r2, regs );
@@ -4086,7 +4086,7 @@ DEF_INST(multiply_subtract_bfp_long)
}
/*-------------------------------------------------------------------*/
/* B30F MSEBR - MULTIPLY AND SUBTRACT (short BFP) [RRF] */
/* B30F MSEBR - MULTIPLY AND SUBTRACT (short BFP) [RRD] */
/*-------------------------------------------------------------------*/
DEF_INST(multiply_subtract_bfp_short_reg)
{
@@ -4094,7 +4094,7 @@ DEF_INST(multiply_subtract_bfp_short_reg)
float32_t op1, op2, op3, ans;
U32 ieee_trap_conds =0;
RRF_R(inst, regs, r1, r2, r3);
RRD(inst, regs, r1, r2, r3);
BFPINST_CHECK(regs);
GET_FLOAT32_OPS( op1, r1, op3, r3, regs );
GET_FLOAT32_OP( op2, r2, regs );
instfmts.h
+16 -24
View File
@@ -66,7 +66,6 @@
#undef RRE
#undef RRE0
#undef RRE_B
#undef RRF_R
#undef RRF_M
#undef RRF_M4
#undef RRF_RM
@@ -292,40 +291,33 @@
}
/*-------------------------------------------------------------------*/
/* */
/* IMPORTANT PROGRAMMING NOTE! */
/* */
/* HISTORICAL PROGRAMMING NOTE */
/*-------------------------------------------------------------------*/
//
// The RRD instruction format doesn't exist in the S/390 architecture.
// Instead it calls that particular instruction format the RRF format
// (which is a COMPLETELY DIFFERENT instruction format in z/Arch).
// Instead it calls that particular instruction format the RRF format,
// which in z/Arch is a completely different instruction format.
//
// That is to say, z/Architecture has both of the RRD and RRF formats
// defined and both are different from each other: in the z/Arch RRD
// format, "r1" starts at bit position 16 and "r3" is at bit position
// 24, whereas the RRF-a and -b formats it is the complete opposite:
// "r1" starts at bit position 24 and "r3" at bit 16 (i.e. r1 and r3
// are in the oppsoite position in the RRD and RRF formats).
// format, "r1" is in bit positions 16-19 and "r3" in bit positions
// 24-27, but for the RRF-a and -b formats they are in the complete
// opposite position: in RRF-a and -b "r1" is in bit position 24-27
// and "r3" is in bit positions 16-19 (i.e. r1 and r3 operands are
// in the oppsoite position in the RRD and RRF formats).
//
// This is confusing since our "RRF_R" format decoder was originally
// written to decode the S/390 "RRF" format, which is now called the
// "RRD" format in z/Architecture.
// This is confusing since Hercules's ORIGINAL "RRF_R" format decoder
// was originally written to decode the S/390 "RRF" format which is
// now called the "RRD" format in z/Architecture.
//
// So the below "RRF_R" instruction decoder is actually the z/Arch
// "RRD" format decoder, even though some of our instructions which
// SHOULD be using the "RRD" decoder are still written to decode
// their instructions using the improperly named "RRF_R" decoder.
// Therefore to eliminate the confusion our original "RRF_R" format
// decoder was removed and all instructions that were using it were
// fixed to correctly use the z/Architecture "RRD" decoder instead
// (which accomplishes the same thing as our original S/390 "RRF_R"
// decoder originally did).
//
/*-------------------------------------------------------------------*/
/*-------------------------------------------------------------------*/
/* RRF_R - register to register with additional R3 field */
/*-------------------------------------------------------------------*/
// This is actually z/Arch RRD format! ((See PROGRAMMING NOTE above!))
#define RRF_R( _inst, _regs, _r1, _r2, _r3 ) RRD_DECODER( _inst, _regs, _r1, _r2, _r3, 4, 4 )
/*-------------------------------------------------------------------*/
/* RRD - register to register with additional R3 field */
/*-------------------------------------------------------------------*/